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ADE7953
SPI INTERFACE
The serial peripheral interface (SPI) uses all four communica-
tion pins: CS, SCLK, MOSI, and MISO. The SPI communication
operates in slave mode and, therefore, a clock must be provided
on the SCLK pin (MOSI is an input, and MISO is an output).
This clock synchronizes all communications and can operate up
to a maximum speed of 5 MHz. See the SPI Interface Timing
section for more information about the communication timing
requirements.
The MOSI pin is an input to the ADE7953 ; data is shifted in on
the falling edge of SCLK to be sampled by the ADE7953 on the
rising edge. The MISO pin is an output from the ADE7953 ; data
is shifted out on the falling edge of SCLK and should be sampled
by the external microcontroller on the rising edge.
The SPI communication packet consists of two initial bytes
that contain the address of the register that is to be read from
or written to. This address should be transmitted MSB first. The
third byte of the communication determines whether a read or
a write is being issued.
CS
SCLK
Data Sheet
The most significant bit of this byte should be set to 1 for a read
operation and to 0 for a write operation. When the third byte
transmission is complete, the register data is either sent from the
ADE7953 on the MISO pin (in the case of a read) or is written
to the ADE7953 MOSI pin by the external microcontroller (in
the case of a write). All data is sent or received MSB first. The
length of the data transfer depends on the width of the register
being accessed. Registers can be 8, 16, 24, or 32 bits long.
Figure 68 and Figure 69 show the data transfer sequence for
an SPI read and an SPI write, respectively. As shown in these
figures, the CS (chip select) input must be driven low to initialize
the communication and driven high at the end of the communi-
cation. Bringing the CS input high before the completion of a
data transfer ends the communication. In this way, the CS input
performs a reset function on the SPI communication. The CS
input allows communication with multiple devices on the same
microcontroller SPI port.
15 14
1 0
MOSI
MISO
REGISTER ADDRESS
1 0 0 0 0 0 0 0
31 30
1 0
REGISTER VALUE
Figure 68. SPI Read
CS
SCLK
15 14
1 0
31 30
1 0
MOSI
REGISTER ADDRESS
0 0 0 0 0 0 0 0
REGISTER VALUE
Figure 69. SPI Write
Rev. B | Page 52 of 72
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